Akron Research Company

Bennett Miller (C) 2026

What I cannot create, I do not understand - Richard Feynman


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The 2 to 4 Decoder is a combinational digital circuit element that will drive an single bit in the output vector y to turn on based on the combination of whether the input a or b are turned on or not. A pretty iconic use of a decoder is for memory addressing decoding, where a certain word line is selected in a SRAM component.

Decoders themselves convert a binary code into a set of output signals, and they also do the inverse of digital encoding. Given any N input lines, there will be 2^(N) output lines for any given decoder.

Each bit of the output can be represented by a corresponding boolean expression:

y[0] = a' * b' where multiplication (or asterisks) represent the AND operation and apostrophes show the complement of that value

y[1] = a' * b

y[2] = a * b'

y[3] = a * b

NOTE: This version I forgot to add a "default" value in case either inputs are X or Z, so be on the lookout for that on the github and I will update here as soon as I can.

System Verilog Code:

module twoToFourDecoder (
    // could technically make this an array of one bit values too.
    input logic a, b,
    output logic [3:0] y
);

    // now technically there is a better way to do this
    // but from a learners standpoint this is alright
    // and likely will be efficiently compiled w/o the person
    // worrying about other kinds of efficiencies.
    always_comb
    begin
        if (a == 1'b0 && b == 1'b0) y = 4'b0001;
        if (a == 1'b0 && b == 1'b1) y = 4'b0010;
        if (a == 1'b1 && b == 1'b0) y = 4'b0100;
        if (a == 1'b1 && b == 1'b1) y = 4'b1000;
    end

endmodule
                    
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