Akron Research Company

Bennett Miller (C) 2026

What I cannot create, I do not understand - Richard Feynman


The 2-to-1 Multiplexer / Multiplexor / MUX

The 2-to-1 MUX / Multiplexer / Multiplexor is a device that allows either input A or B to be driven as its output based on the value of the signal pin provided. It is the basis for more complex devices such as 4-to-1 (or 8-to-1!) MUXes to enhancing full adder circuitry.

The general characteristic equation for a 2:1 (or 2-to-1) MUX is O = S'A + SB, assuming that A, B, S, and O are all one bit inputs and outputs.

This two to one multiplexer itself will show a value of 0 instead of the any one of the inputs to avoid possible errors that may happen when wiring this mux in a more complex circuit, however it may cause confusion if one of your inputs is 0 itself, so be sure to take caution when using this MUX in your circuit to account for that potential failure state.

System Verilog Code:

module twoToOne_mux(
    input logic a, b, sel,
    output logic y
);

    always_comb
    begin
        case (sel)
            0: y = a;
            1: y = b;
            // always good practice to include a default when using case statements
            default: y = 0;
        endcase
    end

endmodule
                    
Netlist Image for 2:1 MUX